The following table contains known issues, scheduled bug fixes, and feature improvements for the Verdin iMX95.
For other information, click on the below links:
Description: The SoM Ethernet PHY uses SMI address 0 (unicast), and the MDIO bus is shared between the SOM and the carrier board. Because of that it is not possible to use an Ethernet PHY on the carrier board that honors the 0 SMI broadcast address.
Customer Impact: Customer circuits implemented on the carrier board that rely on the CTRL_RESET_MOCI signal for delayed start-up may not operate as intended.
Description: Due to the PMIC’s internal logic, the CTRL_RESET_MOCI signal is asserted high immediately after all power rails have been raised. Not waiting until the CTRL_RESET_MICO will go High.
Workaround: Will be fixed in V1.1
Customer Impact: Designs utilizing the CTRL_FORCE_OFF_MOCI# signal to control system power rails are impacted. Following either a long power-button press or a software-initiated power-down request from the SoC, the CTRL_FORCE_OFF_MOCI# signal remains asserted High and does not transition Low as expected.
Description: An error in the schematic of the SoM causes the wrong behaviour of the CTRL_FORCE_OFF_MOCI# signal.
