HAR-11098 | Known Issue | The Verdin AM62 MAYA-W1 input voltage is higher than the recommended absolute maximum rating | Verdin AM62 V1.0 Verdin AM62 V1.1 | Verdin AM62 V1.2 |
Customer Impact: The MAYA-W1 Wi-Fi module can experience reduced reliability and possible damage to internal components if the Verdin AM62 V1.1 VCC is powered with 4.2V or higher. The issue could arise on certain Verdin carrier boards (Verdin Development Board, Mallow, Yavia, and Ivy) that supply the VCC from a 5V rail. Description: The MAYA-W1 Wi-Fi module's datasheet was updated revising the maximum input voltage rating, before Toradex released Verdin AM62 V1.2 products. The absolute maximum input voltage has been adjusted from 6.5V down to 4.2V. Unfortunately, this change affects some Verdin AM62 modules (specifically, the Solo 512MB WB IT V1.1 0072, Dual 1GB WB IT V1.1 0074, and Quad 2GB WB IT V1.1 0076), as they directly power the Wi-Fi module from the module input voltage. The Verdin input voltage range is officially specified as 3.135V to 5.5V.
The issue lies in the carrier board’s power supply to the module. While the Dahlia carrier board adheres to 3.3V voltage, other boards (Verdin Development Board, Mallow, Yavia, and Ivy) provide 5V, exceeding the Wi-Fi module’s specifications. Additionally, any customer-designed carrier boards that exceed 4.2V are also affected.
The Verdin AM62 V1.2 has been updated to power the MAYA-W1 Wi-Fi module from a regulated 3.3V rail. This means Verdin AM62 modules with version 1.2 and newer are not affected by the issue and can be powered with input voltages up to 5.5V without any issue. Modules without Wi-Fi/Bluetooth are not affected by this errata. Workaround: To mitigate this issue, consider the following countermeasures:
For Verdin AM62 V1.1 modules, ensure that the module input voltage remains below 4.2V. Currently, the Dahlia carrier board is the only Verdin family carrier board provided by Toradex that adheres to this limitation by providing 3.3V.
Avoid turning on the Wi-Fi or Bluetooth radio while the module is powered with an input voltage higher than 4.2V.
During evaluation, it’s possible to operate the Wi-Fi module with voltages between 4.2V and 5.5V. However, please be mindful of the potential impact on long-term reliability or damage. Toradex has not observed any damaged Wi-Fi modules in their in-house tests, which span multiple days and include extreme temperature conditions. It’s important to note that this practice deviates from the official MAYA-W1 specifications and is not recommended for use in final products.
For optimal performance and reliability, we recommend a transition to the Verdin AM62 V1.2 modules (when they become available). These newer modules power the MAYA-W1 Wi-Fi module from a regulated 3.3V rail and are not affected by the issue described in this errata. |
HAR-10889 | Known Issue | A manufacturing issue might affect the Verdin AM62 V1.1B functionality | Verdin AM62 V1.1B | Verdin AM62 V1.1C |
Customer Impact: Potential reliability issue affecting the following interfaces: JTAG, ADC, LVDS, UART2, GPIOs ,PWM, CAN, Audio.
However, Toradex has not observed this so far. Description: A PCB manufacturing problem was discovered, where micro-vias on some SoC BGA balls were not plugged, leading to missing solder and reduced yield in the production.
This reduced yield was discovered quite early in the production process. A 100% X-ray control on the affected product batch was put in place in addition to our usual quality control process (AOI, Functional Testing, etc.).
Despite our extensive control and X-ray verification, we cannot rule out the possibility that a limited number of products may have evaded our scrutiny initially. Workaround: If you are experiencing issues with the interfaces cited in the customer impact section, using a Toradex Carrier Board, and running a Toradex Quarterly Release BSP Reference Image, please contact our RMA department. |
HAR-10687 | Known Issue | Standby / Deepsleep Mode Not Working | Verdin AM62 V1.0 Verdin AM62 V1.1 | |
Customer Impact: Verdin AM62 modules have issues supporting the ‘suspend-to-RAM’ or ‘deep sleep’ low power mode. Attempting to put the device into the ‘suspend-to-RAM’ low power state causes it to reset or reboot. Description: The AM62 SoC features a silicon-level design decision by TI, where the output buffer of the pin controller is turned off during suspend-to-RAM (deep sleep). IO can maintain a value of ‘1’ or ‘0’ through a weak internal pull-up or pull-down (22k typical, 30k maximum). This design characteristic on the AM62 presents challenges in handling:
- Output pins of the SoM responsible for controlling the power of external peripherals on the carrier board (e.g., display, CAN transceivers, PCIe devices, USB hub, etc.).
- The CTRL_SLEEP_MOCI# signal, which is an “always compatible” signal on Verdin modules. |
HAR-10823 | Known Issue | U-Boot Might Hang While Detecting Memory Size | Verdin AM62 V1.1 | |
Description: The boot process might hang with the following error on 512MB module variant:
```
U-Boot SPL 2023.04-6.4.0-devel+git.96179e4a5bb0 (Sep 06 2023 - 06:13:04 +0000)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.7--v09.00.07 (Kool Koala)')
WARNING: Less than 64MB RAM detected
``` Workaround: Reset the board. |
HAR-10648 | Known Issue | A manufacturing issue might affect the Verdin AM62 V1.1A DSI bridge functionality | Verdin AM62 V1.1B Verdin AM62 V1.1A | Verdin AM62 V1.1C |
Customer Impact: The Toshiba TC9594XBG MIPI DSI bridge might not work reliably because of a soldering issue on the module. The Verdin AM62 MIPI DSI output might not function properly in this situation. Description: A few Verdin AM62 are affected by a soldering issue on an LDO that generates the 1.2V voltage for the Toshiba TC9594XBG MIPI DSI bridge. In this situation, the MIPI DSI output of the module might not work reliably. Workaround: If your module is affected by this errata, please contact the Toradex RMA department. This issue will be fixed in future product revisions. |
HAR-10647 | Known Issue | A manufacturing issue might affect the Verdin AM62 V1.1A Ethernet PHY functionality | Verdin AM62 V1.1B Verdin AM62 V1.1A | Verdin AM62 V1.1C |
Customer Impact: The Texas Instruments DP83867IR Ethernet Transceiver might not work reliably because of a soldering issue on the module. The Verdin AM62 Gigabit Ethernet interface might not function properly in this situation. The module RGMII interface is not affected by this errata. Description: A few Verdin AM62 are affected by a soldering issue on an LDO that generates the 1.0V voltage for the Texas Instruments DP83867IR Ethernet Transceiver. In this situation, the Gigabit Ethernet interface of the module might not work reliably. The module RGMII interface is not affected by this errata. This interface can be used to evaluate the module network functionalities. Workaround: If your module is affected by this errata, please contact the Toradex RMA department. This issue will be fixed in future product revisions. |
HAR-10456 | Known Issue | FTDI JTAG debugger cannot work with Verdin AM62 | Verdin AM62 V1.1 | Verdin AM62 V1.2 |
Customer Impact: The JTAG interface on the Verdin AM62 module cannot be initialized by JTAG debuggers with an open drain TRSTn output. Description: The JTAG interface on the Verdin AM62 modules is not compatible with JTAG debuggers featuring an open drain TRSTn output.
This is due to the power-up and normal operation requirements for the AM62 SoC’s JTAG interface.
Power-up: According to Texas Instruments requirements, the TRSTn pin of the SoC should be held low during the SoC’s power-up for proper JTAG interface initialization. For this reason, the TRSTn pin of the SoC is pulled down to GND on the Verdin AM62 SoM with a 4.7 kOhm resistor.
Normal operation: Texas Instruments recommends holding the TRSTn input low also during normal operation to prevent any noise on the other JTAG signals from accidentally causing the debug subsystem to alter code execution. To activate the JTAG interface, the AM62 SoC's TRSTn input (JTAG_1_TRST# input of the SoM) should be pulled up after the SoM's power-up.
If the debugger has the TRSTn output configured as an Open Drain, it cannot set the SoM’s JTAG_1_TRST# input high and activate the JTAG interface. Workaround: There are two ways of overcoming the JTAG interface limitations:
- Use the debugger with the ability to operate its TRSTn output as push-pull.
- Pull-up the JTAG_1_TRST# input of the SoM to the JTAG_1_VREF voltage manually when the SoM’s power-up phase is completed. |