The following table contains known issues, scheduled bug fixes, and feature improvements for the Aquila AM69.
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Customer Impact: None. The observed bending does not impact the functionality or electrical performance of the module. All shipped units have successfully passed the standard production functional test.
Description: A slight bending of the X1 connector relative to the PCB surface may be present on some modules. This condition is related to the current SMT assembly process. Process improvements are currently being implemented on the production line to further optimize the connector coplanarity during assembly.
Workaround: No action is required from the user. The modules can be used as intended.
Customer Impact: The Aquila AM69 (V1.0A) module does not properly comply with the CTRL_RESET_MICO# signal as defined in the Aquila Family Specification. As a result, carrier boards cannot reliably extend the reset period of the module, which may lead to undesired or premature boot behavior in some system designs.
Description: Due to a deviation from the specification, the module exits reset and begins the boot sequence immediately after the falling edge of CTRL_RESET_MICO#, instead of remaining in reset while the signal stays low. This prevents proper synchronization of reset timing between the module and the carrier board.
Workaround: There is no identified workaround.
Customer Impact: No functionality impact is expected from this issue. USB_x_OC# and USB_x_EN signal level (3.3V) is not in line with the Family specification (1.8V).
Description: The USB_x_OC# and USB_x_EN signals of the USB bridge are operating at 3.3V instead of the 1.8V level defined in the module family specification. This deviation does not affect the functionality of the USB interface in typical use cases. However, designs expecting strict 1.8V logic levels on these signals should take this into account. The issue was fixed in the V1.1 board revision.
Workaround: If your design depends on 1.8V logic levels for USB_x_OC# or USB_x_EN, consider the following options: (1) Use a level shifter to translate the 3.3V signals to 1.8V or (2) if the signal is not used, it can be left unconnected or pulled up to 3.3V using a resistor (e.g., 10kΩ), depending on your design requirements.
Customer Impact: The onboard Ethernet interface currently does not meet Ethernet compliance due to high jitter from the 25MHz clock. This issue will be resolved in the next module revision.
Description: The Ethernet interface on the module uses the 25MHz clock directly from the SoC. The jitter introduced by the clock is too high to pass Ethernet Compliance.
Customer Impact: Customers cannot use the USB_2 interface with BSP 6-based software, including the Toradex Easy Installer. The interface functions properly with operating systems based on BSP 7
Description: The USB_2_EN# pin is designed to be active low but is currently active high. In the current revision, this requires an additional transistor or inverter on the carrier board. A software fix addressing this issue has been implemented in BSP 7.
Workaround: Use VNC (Virtual Network Computing) to access Toradex Easy installer and install an operating system based on BSP 7.
Customer Impact: Customers should implement voltage divider on the carrier board to make USB_1 compatible with 5V on carrier boards compatible with Aquila AM69 V1.0.
Description: The VBUS input - USB_1_VBUS - is only compatible with 3.3V. It requires a voltage divider to be 5V tolerant.
Workaround: Add a voltage divider on the carrier board for the USB_1_VBUS signal.
Customer Impact: The USB_2 interface lacks serial capacitors on the USB_2_SS_TX lines. This does not affect usage with the Aquila Development Board V1.2, as it includes the necessary capacitors. However, when designing custom carrier boards for the AM69 V1.0 revision, customers must account for this limitation by adding serial capacitors. The next module revision will address this issue.
Description: The USB_2_SS_TX lines lack the required 100nF serial capacitors. The Aquila Development Board V1.2 addresses this by replacing the R461 and R462 resistors with capacitors. Customers should account for this limitation when designing custom carrier boards for the AM69 revision.
Workaround: When designing custom carrier boards for the AM69 V1.0 revision, customers must include 100nF serial capacitors on the USB_2_SS_TX lines. These capacitors can later be replaced with 0R resistors to ensure compatibility with future AM69 module revisions.
