The following table contains known issues, scheduled bug fixes, and feature improvements for the Colibri iMX6ULL.
For other information, click on the below links:
Customer Impact: On rare occasions, a small amount of Colibri iMX6ULL SoMs may fail to communicate with the Ethernet PHY after power-up, rendering the Ethernet interface unusable until the SoM gets power cycled.
Description: The Microchip KSZ8041 Ethernet PHY has an errata: https://ww1.microchip.com/downloads/en/DeviceDoc/80000700A.pdf. According to the second item in the document, a small percentage (less than 1%) of the devices can potentially fail to properly read the strapping pins and set the intended configuration if the 3.3V supply rail rises too fast. On the Colibri iMX6ULL SoM, the 3.3V power rail for the Ethernet rises faster than the required 250us. Therefore, on rare occasions, a small amount of Colibri iMX6ULL SoMs may fail to communicate with the Ethernet PHY after power-up. If the strapping of the PHY configuration fails, the system cannot communicate with the PHY over the MDIO interface. The Ethernet port is not working in this case. According to our tests, the issue mainly appears on the affected modules if the power is enabled at extremely low temperatures (below -30°C). The pull-up resistors of the Ethernet LEDs on the carrier board can backfeed to the 3.3V Ethernet power rail on the module. This backfeeding actually reduces the risk of strapping failures.
Workaround: There is currently no permanent workaround. If the Ethernet PHY is not accessible, try to power cycle the Ethernet PHY or the complete Colibri SoM. Disabling the RMII clock turns off the Ethernet power rails. Try waiting at least 1 second before reenabling the RMII clock and initializing the Ethernet PHY.
Customer Impact: Ethernet LEDS don't turn off on all Toradex Colibri Carrier Boards in Standby/Suspend Mode on iMX6ULL
Description: Ethernet LEDS don't turn off on all Toradex Colibri Carrier Boards in Standby/Suspend Mode on iMX6ULL
Customer Impact: The Ethernet PHY might not exit the power save mode correctly.
Description: Due to the Microchip KSZ8041NL Ethernet PHY errata, the Ethernet can become unusable after exiting the power save mode. The Ethernet PHY is powering down the PLL during the software power down, which can create problems. The issues only appear under certain circumstances and in certain temperature ranges. The issue cannot be reproduced with all modules.
Customer Impact: The whole module can get unintentionally powered from the VCC_BACKUP rail after removing the main power supply input VCC from the module.
Description: The VCC_BATT input of the module (pin 40) powers the SNVS rail of the SoC. Besides the RTC and power management function, the i.MX 6ULL SoC uses this rail also as IO rail for the pins in the SNVS block (SNVS pins). Some of these interface pins are available on the SODIMM connector as regular GPIOs (SODIMM pin 43, 45, 93, 95, 105, 107, 127, 131, 137, and 138). Since the VCC_BATT on the Colibri standard is meant to be used as RTC battery input and not for powering IO rails, a power rail switch is added to the module. If the module is powered up, the VCC_BATT rail is connected to the 3.3V rail.
